1. Technical Field
The present invention relates to a technique for generating multiple conductor segments within a plated through hole of a printed circuit board.
2. Related Art
Contemporary printed circuit boards require high-density wiring circuitry for accommodating the wiring requirements of particular chips which are affixed to the circuit board. Although a plated-through hole (PTH) provides a mechanism for coupling a chip to circuitry on or within the circuit board, current PTH technology allows only one signal conductor to utilize a PTH. Since each PTH occupies valuable area on the surface of a circuit board, the number of PTHs that can be fabricated within a given area on the circuit board is limited, which in turn places a ceiling on the maximum number of possible wiring connections within the given area.
While reducing PTH diameter increases the number of PTHs that can be fabricated, process and reliability considerations impose a practical limit as to how small a PTH can be. First, the drilling of holes becomes increasingly difficult as hole size decreases. Second, the plating of a hole to create a PTH becomes more difficult and less reliable as the aspect ratio (hole depth/hole diameter) increases. Third, the durability of the PTH due to thermal cycling diminishes as the PTH diameter decreases. As temperature is varied, thermal stresses within the PTH are induced by the difference in the coefficient of thermal expansion of the conductive plating on the PTH and the adjacent dielectric material of the circuit board.
Thus, there is a need to improve wireability of printed circuit boards while maintaining acceptable reliability of PTHs.